搜索资源列表
entropy_coding
- 用verilog 描述的嫡编码(entropy coding) 应用于图像压缩编码 有测试文档 -using Verilog His descr iption of coding (entropy coding) for image compression test files are encoded
run_length_coding
- 用verilog 编写 应用于图像压缩编码中 使用行程长度编码(run lengthencoding,RLE)对交流系数(Aa)进行编码。-using Verilog prepared for image compression coding using length encoding (run leng thencoding, RLE) on the exchange coefficient (Aa) coding.
verilog_jpeg
- 用verilog 描写 应用于数字图像压缩系统--jpeg 有测试文档-using Verilog descr iption applied to digital image compression system -- a test jpeg files
dct_mac
- dct verilog code for image -Extra Verilog code for image
videofram
- 用CPLD控制图像卡进行帧存逻辑的verilog程序,用Quartus II 5.0打开-with CPLD control image frame buffer cards logical verilog procedures, Quartus II 5.0 Open
ModelProjects
- 实现了图像处理的Verilog级,包含有七个主要 文件-image processing to achieve the level of Verilog, contains seven key documents
RGB_color_transform_gray_level_co-design_of_C_and_
- to use verilog code and c to translate a RGB bmp image(512*512) to a gray level image
vga.rar
- 基于DE2板子的,VGA 图像显示,采用verilog语言,Based on the DE2 board, VGA image display, using Verilog language
VGA
- 基于Verilog的VGA显示程序 用于实现FPGA对于VGA显示器的控制实现图像显示,并给出相关测试的TB文件-The VGA display program based on Verilog FPGA for implementing the control of the VGA display Image display
fpgajpeg
- fpga实现图像的压缩,适合初学者,很快了解图像压缩和verilog-fpga to achieve image compression, suitable for beginners, will soon understand the image compression and verilog
DE2_TV
- image acquistion program verilog modeling.
DWT
- deals with implementation of DWT
decode
- 该程序适用于verilog初级入门者,对于4*4图像编码后生成的编码进行译码,得到编码前的数据-This procedure applies to verilog primary beginners, for 4* 4 image coding coding generated after decoding to obtain the data before encoding
VGAchardisplay
- 基于verilog的VGA字符、汉字、图片显示的程序。-Verilog VGA-based characters, Chinese characters, image display program.
8-8DCT变换verilogHDL代码
- DCT变换实现图像压缩及嵌入水印等,内含测试文件及DCT算法讲解(Image compression and embedding watermark by DCT transform)
median_filter
- 这个verilog程序实现了图像中值滤波,处理实时性很强,有兴趣的可以参考(This Verilog program implements the median filter in the image, the processing is very real, and the interest can be referred to)
VIP_RAW2RGB2Gray_Medium_Sobel_Erosion_Dilation
- 通过纯HDL逻辑实现,对ov7725摄像头进行图像采集,存储,处理,包括中值滤波,边缘检测等经典图像算法实现(Through the realization of pure HDL logic, image acquisition, storage and processing of ov7725 camera, including median filtering, edge detection and other classic image algorithms.)
DWT_verilog-code
- 图像压缩是图像处理中的一个重要课题,在减少图像尺寸以实时传输和存储方面起着非常重要的作用。许多标准推荐使用DWT进行图像压缩。DWT的计算复杂度对基于DWT的图像压缩算法的实时使用提出了重大挑战。在本文中,我们提出了一种改进的提升方案来计算近似和详细的DWT系数。修正的方程使用右移运算符和6位乘法器。计算中的层级减少到一个,从而最小化延迟和增加吞吐量。ViTEX-5 FPGA上实现的设计工作在180 MHz,功耗小于1W的功率。该设计占用了FPGA上不到1的LUT资源。所开发的体系结构适合于FP
sobel
- 由Verilog编写在FPGA实现sobel算法应用于图像边缘检测,工程文件可在quartus13.1以上版本打开;工程使用到ram、fifo、pll三种ip核,design文件夹下包含ram、fifo、vga控制以及串口收发和sobel算法模块,sim和doc文件夹下分别包含modelsim的仿真模块和仿真结果;测试时将200*200分辨率的图片用matlab文件夹下的matlab脚本压缩、二值化,再将生成文件中数据用串口发给FPGA,边缘检测结果会通过VGA输出。(Written by Ve
lab6
- 使用vivado和Xilinx开发板实现VGA图像显示,开发板为Xilinx Artix-7(Using vivado and Xilinx development board to realize VGA image display, the development board is Xilinx artix-7)